1. Field of the Invention
The present invention relates generally to a floating gate memory cell, and more particularly, to an air tunnel floating gate memory cell and a method for making such a memory cell.
2. Description of the Related Art
As shown in FIG. 1, a conventional floating gate memory cell 100 includes a substrate 110 with doped source 120 and drain 130. A tunnel oxide layer 140 is situated between a floating gate 150 and the substrate 110. An oxide-nitride-oxide (ONO) stack 160 is disposed over the floating gate 150, and a control gate 170 is formed over the ONO stack 160.
The conventional floating gate memory cell 100 uses the tunnel oxide layer 140 as an insulator layer to preserve the charge stored at the floating gate 150. The thickness of the tunnel oxide layer 140 is usually greater than 7 nm. The tunnel oxide layer 140 also serves as a charge transport media for the program/erase operation of the conventional floating gate memory cell 100. However, after a large number of program/erase cycles, the large quantities of injected charge through the tunnel oxide layer 140 induce severe stress-induced leakage current (SILC), leading to the degradation of the tunnel oxide layer 140. The degradation of the tunnel oxide layer 140 will slow down the program/erase speed and reduce the charge retention ability of the floating gate 150 of the conventional floating gate memory cell 100.
In order to enhance the program/erase speed of the conventional floating gate memory cell 100, a larger electric field can be applied to the conventional floating gate memory cell 100. However, the larger electric field will cause more severe degradation of tunnel oxide layer 140. Therefore, the tunnel oxide layer 140, having a program/erase speed upper bound, limits the performance of the conventional floating gate memory cell 100.
In view of the foregoing, there is a need for an improved floating gate memory cell that will enhance the performance and avoid the problems of a conventional floating gate memory cell.